8088 (1979) 1st generation

8 bit data bus
4.77Mhz
40-pin DIP

8086 (1978) 2nd generation

16 bit data bus
4.77Mhz
40-pin DIP

80286 (1982) 2nd generation

Virtual memory - Using the HDD to act as RAM. Needs a more advanced OS like OS/2 or Windows.
Real Mode - 80286 emulates 8086 and only addresses the first 1 MB of RAM.
Protected Mode – Allows access to all memory on the system, both physical and virtual.

80386 (1985) 3rd Generation

Virtual Real Made - A true multitasking mode that allows separate sessions called virtual machines to exist at once.

80486 (1989) 4th Generation

Integrated math coprocessor, cache controller and L1 cache memory on the chip.
The 486 requires a heat sink and fan to dissipate the heat.
System Memory Management (SMM) CPU can shut down peripherals not in use.
Clock doubling.

486 DX2 (1992) 4th Generation

Internally the DX 2 had its clock doubled to 50 or 66 MHz, while it's data bus still operated at 25 or 33 MHz respectfully.

486 DX4 (1994) 4th Generation

Internal speed (75 or 100 MHz) was 3 times data bus speed (25 or 33 MHz).
Note: The 486 DX 50 MHz chip was superior to the 486 DX2 50 MHz because it's internal and external clock rates were both 50 MHz. It could fetch data in RAM and process it without generating wait states.

Pentium (1993) 5th Generation

Dual Pipeline - 32-bit data bus processes two lines of code simultaneously.
Branch Prediction - Anticipates subsequent instructions and loads them into cache resulting in faster processing.
P90-External speed 60MHz -Internal speed 90MHz
P100- External speed 66MHz -Internal speed 100MHz
Slower external speeds due to slower system boards.

Pipelining
To carry out one instruction a CPU must:
1. Read the instruction.
2. Decode instruction.
3. Fetch operands.
4. Execute
5. Write back results

Older CPUs executed the steps one at a time over many clock cycles. Pentiums execute the five steps in one cycle using a process called pipeling.
Superscalar (multithreading)
Superscalar technology has two pipelines U and V. U can execute all instructions while V can execute a subset.

Pentium Pro (1995) 6th Generation

Originally designed for 32-bit servers and CAD workstations. Internal Risk architecture. 3-way superscalar technology.
Dynamic execution - Data flow is analyzed and sequenced for optimization. Using branch prediction the CPU processes up to 5 instructions and determines data dependencies for processing as soon as inputs are available.

Pentium MMX (1997) 5th Generation

Because of larger data and code caches an MMX CPU could run non MMX programs up to 20% faster. 57 new multimedia instructions using SIMD (Single Instruction Multiple Data) stream processing. More compatible with 16-bit software than Pentium Pro.

Pentium II (1997) 6th Generation

- Multiple branch prediction.
- SEC (Single Edge Connector)
- Dedicated system bus and cache bus.
- Unified 512k L2 cache with dedicated 64-bit bus. 16KB data cache 16KB instruction cache.
- ECC on L2 bus
- Parity check on system bus

Celeron (1998)

- SEC or PGA
- MMX
- Multiple branch predictions
- Data flow analysis
- Speculative execution

Xeon

- High end, high quality reliable server processor.
- Made from P2,P3,P4

Pentium III (1999) 6th Generation

- System bus speed 100MHz to 133MHz.
- Internal speed 500MHz to 733MHz
- MMX
- Branch prediction
- Data flow analysis
- Speculative execution
- Multiple low power states
- Comes in Xenon version.

Pentium IV (2000) 7th generation

- Hyper Threading
- Bus speed: 400/533/800 MHz

Centrino (2003)

- Chipset
- Integrated Wireless technology

Itanium (2001)

- EPIC architecture
- System bus: 100MHz
- 64 bit code
- Applications must be recompiled

Itanium 2 (2002)

- EPIC architecture
- System bus: 400MHz 128-bit width
- 64 bit code
- Applications must be recompiled